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NTQD6968 Power MOSFET 6.6 Amps, 20 Volts
N-Channel TSSOP-8
Features
* * * * * *
Ultra Low RDS(on) Higher Efficiency Extending Battery Life Logic Level Gate Drive Miniature Dual TSSOP-8 Surface Mount Package Diode Exhibits High Speed, Soft Recovery Micro8 Mounting Information Provided
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Applications
* Power Management in Portable and Battery-Powered Products, i.e.:
Computers, Printers, PCMCIA Cards, Cellular and Cordless Telephones
MAXIMUM RATINGS (TC = 25C unless otherwise noted)
Rating Drain-to-Source Voltage Gate-to-Source Voltage - Continuous Drain Current - Continuous @ TA 25C Drain Current - Continuous @ TA 70C Drain Current - Pulsed (Note 3) Total Power Dissipation @ TA 25C Drain Current - Continuous @ TA 25C Drain Current - Continuous @ TA 70C Drain Current - Pulsed (Note 3) Total Power Dissipation @ TA 25C Operating and Storage Temperature Range Single Pulse Drain-to-Source Avalanche Energy - Starting TJ = 25C (VDD = 20 Vdc, VGS = 5.0 Vdc, Peak IL = 5.5 Apk, L = 10 mH, RG = 25 ) Thermal Resistance - Junction-to-Ambient (Note 1) Junction-to-Ambient (Note 2) Maximum Lead Temperature for Soldering Purposes for 10 seconds Symbol VDSS VGS ID ID IDM PD ID ID IDM PD TJ, Tstg EAS Value 20 "12 5.4 4.5 15 0.94 6.6 4.5 20 1.42 -55 to +150 150 Unit Vdc Vdc Adc G1
6.6 AMPERES 20 VOLTS RDS(on) = 22 m
N-Channel D N-Channel D
G2 S1 S2
W Adc 8 W C mJ 1 TSSOP-8 CASE 948S PLASTIC
MARKING DIAGRAM & PIN ASSIGNMENT
D S1 S1 G1 1 2 3 4 968 YWW N Top View 968 Y WW N = Device Code = Year = Work Week = MOSFET 8 7 6 5 D S2 S2 G2
RqJA
C/W 132 88 260 C
TL
1. Minimum FR-4 or G-10 PCB, Steady State. 2. Mounted onto a 2 square FR-4 Board (1 sq. 2oz. Cu 0.06 thick single sided), Steady State. 3. Pulse Test: Pulse Width = 300 s, Duty Cycle = 2%.
ORDERING INFORMATION
Device NTQD6968 NTQD6968R2 Package TSSOP-8 TSSOP-8 Shipping 100 Units/Rail 3000/Tape & Reel
(c) Semiconductor Components Industries, LLC, 2001
1
November, 2001 - Rev. 0
Publication Order Number: NTQD6968/D
NTQD6968
ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted)
Characteristic OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage (VGS = 0 Vdc, ID = 250 Adc) Temperature Coefficient (Positive) Zero Gate Voltage Collector Current (VDS = 16 Vdc, VGS = 0 Vdc, TJ = 25C) (VDS = 16 Vdc, VGS = 0 Vdc, TJ = 125C) Gate-Body Leakage Current (VGS = 12 Vdc, VDS = 0 Vdc) ON CHARACTERISTICS Gate Threshold Voltage (VDS = VGS, ID = 250 Adc) Temperature Coefficient (Negative) Static Drain-to-Source On-State Resistance (VGS = 4.5 Vdc, ID = 6.6 Adc) (VGS = 2.5 Vdc, ID = 5.3 Adc) (VGS = 2.5 Vdc, ID = 3.3 Adc) Forward Transconductance (VDS = 10 Vdc, ID = 6.6 Adc) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Transfer Capacitance SWITCHING CHARACTERISTICS (Notes 4 & 5) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Gate Charge (VDS = 16 Vdc, VGS = 4.5 Vdc, ID = 6.6 Adc) 6 6 Ad ) (VDD = 16 Vdc, ID = 6.6 Adc, VGS = 4.5 Vdc, RG = 6.0 ) td(on) tr td(off) tf Qtot Qgs Qgd - - - - - - - 9.0 35 70 70 13.5 3.0 4.0 - - - - 20 - - nC ns (VDS = 16 Vd VGS = 0 Vdc, Vdc, Vd f = 1.0 MHz) Ciss Coss Crss - - - 900 350 100 - - - pF VGS(th) 0.6 - RDS(on) - - - gFS - - - - 19.2 0.022 0.030 0.030 - Mhos 0.75 -2.5 1.2 - Vdc mV/C V(BR)DSS 20 - IDSS - - IGSS - - - - 1.0 10 nAdc 100 - 12 - - Vdc mV/C Adc Symbol Min Typ Max Unit
BODY-DRAIN DIODE RATINGS (Note 4) Forward On-Voltage Reverse Recovery Time (IS = 6.15 Adc, VGS = 0 Vdc, 6 15 Ad Vd dIS/dt = 100 A/s) Reverse Recovery Stored Charge 4. Pulse Test: Pulse Width = 300 s, Duty Cycle = 2%. 5. Switching characteristics are independent of operating junction temperature. (IS = 6.0 Adc, VGS = 0 Vdc) VSD trr ta tb QRR - - - - - - 30 19 15 0.017 1.2 - - - - C Vdc ns
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NTQD6968
16 ID, DRAIN CURRENT (AMPS) 14 12 10 2.2 V 8 6 4 2 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 2 1.4 V 1.2 V 1.6 V 5V 3V 2V VGS = 10 V 18 TJ = 25C 1.8 V ID, DRAIN CURRENT (AMPS) 16 14 12 10 8 6 4 2 0 0.75 TJ = 25C TJ = 100C TJ = -55C 2.5 VDS 10 V
1 1.25 1.75 2.25 1.5 2 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
Figure 1. On-Region Characteristics
RDS(on), DRAIN-TO-SOURCE RESISTANCE () RDS(on), DRAIN-TO-SOURCE RESISTANCE ()
Figure 2. Transfer Characteristics
0.03 ID = 6.5 A TJ = 25C
0.04 TJ = 25C 0.035 0.03 0.025 0.02 VGS = 4.5 V 0.015 0.01 VGS = 2.5 V
0.02
0.01
0
2
4
6
8
2
4
6
8
10
12
14
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
ID, DRAIN CURRENT (AMPS)
Figure 3. On-Resistance versus Gate-to-Source Voltage
RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 2 ID = 3.3 A VGS = 4.5 V 1.5 10000
Figure 4. On-Resistance versus Drain Current and Gate Voltage
VGS = 0 V IDSS, LEAKAGE (nA) TJ = 150C 1000
1
100 TJ = 100C 10
0.5
0 -50
1 -25 0 25 50 75 100 125 150 4 8 12 16 20 TJ, JUNCTION TEMPERATURE (C) VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 5. On-Resistance Variation with Temperature
Figure 6. Drain-to-Source Leakage Current versus Voltage
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NTQD6968
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
3000 2500 C, CAPACITANCE (pF)
5 QT 4 VGS 3
5
VDS = 0 V Ciss
VGS = 0 V
TJ = 25C
4
2000 1500 1000 500 Crss 0 10 5 VGS 0 VDS 5 10 15 20 Crss
3
2
Ciss Coss
Q1
Q2
2
1
ID = 6.6 A TJ = 25C 2 4 6 8 10
1
0 0
0 12
GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
1000 IS, SOURCE CURRENT (AMPS) VDD = 16 V ID = 6.6 A VGS = 4.5 V t, TIME (ns) 100 tf tr 10 td(off) 1.4 1.2 1 0.8 0.6 0.4 0.2 0
Figure 8. Gate-to-Source Voltage versus Total Charge
VGS = 0 V TJ = 25C
td(on) 1 1 10 RG, GATE RESISTANCE () 100
0.5
0.55
0.6
0.65
VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time Variation versus Gate Resistance
100 ID, DRAIN CURRENT (AMPS) VGS = 20 V SINGLE PULSE 10 TC = 25C 100 s 1 ms 10 ms 1
Figure 10. Diode Forward Voltage versus Current
di/dt IS trr ta tb TIME 0.25 IS IS
0.1
RDS(on) Limit Thermal Limit Package Limit 1 10
dc
tp 100
0.01 0.1
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased Safe Operating Area
Figure 12. Diode Reverse Recovery Waveform
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NTQD6968
10
R(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED)
1 D = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 0.01
0.001 Single Pulse
0.0001 0.000001
0.00001
0.0001
0.001
0.01 t, TIME (s)
0.1
1
10
100
Figure 13. Thermal Response
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NTQD6968 INFORMATION FOR USING THE TSSOP-8 SURFACE MOUNT PACKAGE
RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to ensure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process.
0.038 0.95
0.252 6.4
0.177 4.5
0.018 0.45
0.026 0.65
inches mm
SOLDERING PRECAUTIONS The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. * Always preheat the device. * The delta temperature between the preheat and soldering should be 100C or less.* * When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10C. * The soldering temperature and time shall not exceed 260C for more than 10 seconds. * When shifting from preheating to soldering, the maximum temperature gradient shall be 5C or less. * After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. * Mechanical stress or shock should not be applied during cooling. * * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. * * Due to shadowing and the inability to set the wave height to incorporate other surface mount components, the D2PAK is not recommended for wave soldering.
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NTQD6968
TYPICAL SOLDER HEATING PROFILE For any given circuit board, there will be a group of control settings that will give the desired heat pattern. The operator must set temperatures for several heating zones, and a figure for belt speed. Taken together, these control settings make up a heating "profile" for that particular circuit board. On machines controlled by a computer, the computer remembers these profiles from one operating session to the next. Figure 14 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board. This profile will vary among soldering systems but it is a good starting point. Factors that can affect the profile include the type of soldering system in use, density and types of components on the board, type of solder used, and the type of board or substrate material being used. This profile shows temperature versus time. The line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. The two profiles are based on a high density and a low density board. The Vitronics SMD310 convection/infrared reflow soldering system was used to generate this profile. The type of solder used was 62/36/2 Tin Lead Silver with a melting point between 177-189C. When this type of furnace is used for solder reflow work, the circuit boards and solder joints tend to heat first. The components on the board are then heated by conduction. The circuit board, because it has a large surface area, absorbs the thermal energy more efficiently, then distributes this energy to the components. Because of this effect, the main body of a component may be up to 30 degrees cooler than the adjacent solder joint.
STEP 1 PREHEAT ZONE 1 "RAMP" 200C
STEP 2 STEP 3 VENT HEATING "SOAK" ZONES 2 & 5 "RAMP"
STEP 4 HEATING ZONES 3 & 6 "SOAK"
DESIRED CURVE FOR HIGH MASS ASSEMBLIES 150C
160C
STEP 5 STEP 6 STEP 7 HEATING VENT COOLING ZONES 4 & 7 205 TO 219C "SPIKE" PEAK AT 170C SOLDER JOINT
150C 100C 100C DESIRED CURVE FOR LOW MASS ASSEMBLIES 5C 140C
SOLDER IS LIQUID FOR 40 TO 80 SECONDS (DEPENDING ON MASS OF ASSEMBLY)
TIME (3 TO 7 MINUTES TOTAL)
TMAX
Figure 14. Typical Solder Heating Profile
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NTQD6968
PACKAGE DIMENSIONS
TSSOP-8 CASE 948S-01 PLASTIC ISSUE O
8x
K REF 0.10 (0.004)
M
0.20 (0.008) T U
S
TU
S
V
S
L
1 PIN 1 IDENT 4
B -U-
J J1
0.20 (0.008) T U
S
A -V- C
SECTION N-N
0.076 (0.003) -T-
SEATING PLANE
D
G
DETAIL E
P N P1
N
DETAIL E
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-0031 Phone: 81-3-5740-2700 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative.
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EEEE CCC EEEE CCC
K1 K -W- 0.25 (0.010) M F
2X
L/2
8
5
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 2.90 3.10 4.30 4.50 --1.10 0.05 0.15 0.50 0.70 0.65 BSC 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ --2.20 --3.20 INCHES MIN MAX 0.114 0.122 0.169 0.177 --0.043 0.002 0.006 0.020 0.028 0.026 BSC 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ --0.087 --0.126
DIM A B C D F G J J1 K K1 L M P P1
NTQD6968/D

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